fix assembly errors with hal

.gitmodules

@@ -1,6 +1,7 @@
 [submodule "lib/chibios"]
 	path = lib/chibios
 	url = https://github.com/qmk/ChibiOS
+  branch = handwire
 [submodule "lib/chibios-contrib"]
 	path = lib/chibios-contrib
 	url = https://github.com/qmk/ChibiOS-Contrib

common.mk

@@ -3,16 +3,16 @@ include message.mk
 # Directory common source files exist
 TOP_DIR = .
 TMK_DIR = tmk_core
-TMK_PATH = $(TOP_DIR)/$(TMK_DIR)
-LIB_PATH = $(TOP_DIR)/lib
+TMK_PATH = $(TMK_DIR)
+LIB_PATH = lib
 
 QUANTUM_DIR = quantum
-QUANTUM_PATH = $(TOP_DIR)/$(QUANTUM_DIR)
+QUANTUM_PATH = $(QUANTUM_DIR)
 
 DRIVER_DIR = drivers
-DRIVER_PATH = $(TOP_DIR)/$(DRIVER_DIR)
+DRIVER_PATH = $(DRIVER_DIR)
 
-BUILD_DIR := $(TOP_DIR)/.build
+BUILD_DIR := .build
 
 COMMON_VPATH := $(TOP_DIR)
 COMMON_VPATH += $(TMK_PATH)
@@ -21,4 +21,4 @@ COMMON_VPATH += $(QUANTUM_PATH)/keymap_extras
 COMMON_VPATH += $(QUANTUM_PATH)/audio
 COMMON_VPATH += $(QUANTUM_PATH)/process_keycode
 COMMON_VPATH += $(QUANTUM_PATH)/api
-COMMON_VPATH += $(DRIVER_PATH)
+COMMON_VPATH += $(DRIVER_PATH)

common_features.mk

@@ -20,6 +20,13 @@ SERIAL_SRC += $(wildcard $(SERIAL_PATH)/system/*.c)
 SERIAL_DEFS += -DSERIAL_LINK_ENABLE
 COMMON_VPATH += $(SERIAL_PATH)
 
+COMMON_VPATH += $(DRIVER_PATH)
+ifeq ($(PLATFORM),AVR)
+  COMMON_VPATH += $(DRIVER_PATH)/avr
+else
+  COMMON_VPATH += $(DRIVER_PATH)/arm
+endif
+
 ifeq ($(strip $(API_SYSEX_ENABLE)), yes)
     OPT_DEFS += -DAPI_SYSEX_ENABLE
     SRC += $(QUANTUM_DIR)/api/api_sysex.c
@@ -117,7 +124,7 @@ endif
 ifeq ($(strip $(RGB_MATRIX_ENABLE)), yes)
     OPT_DEFS += -DRGB_MATRIX_ENABLE
     SRC += is31fl3731.c
-    SRC += i2c_master.c
+    SRC += twi2c.c
     SRC += $(QUANTUM_DIR)/color.c
     SRC += $(QUANTUM_DIR)/rgb_matrix.c
     CIE1931_CURVE = yes
@@ -197,6 +204,17 @@ ifeq ($(strip $(USB_HID_ENABLE)), yes)
     include $(TMK_DIR)/protocol/usb_hid.mk
 endif
 
+ifeq ($(strip $(I2C_SLAVE_ENABLE)), yes)
+    SRC += twi2c.c
+    OPT_DEFS += -DI2C_SLAVE_ENABLE
+endif
+
+ifeq ($(strip $(ENCODER_ENABLE)), yes)
+    OPT_DEFS += -DENCODER_ENABLE
+    SRC += $(QUANTUM_DIR)/encoder.c
+endif
+
+
 QUANTUM_SRC:= \
     $(QUANTUM_DIR)/quantum.c \
     $(QUANTUM_DIR)/keymap_common.c \

docs/_summary.md

@@ -34,6 +34,7 @@
   * [Bootmagic](feature_bootmagic.md)
   * [Command](feature_command.md)
   * [Dynamic Macros](feature_dynamic_macros.md)
+  * [Encoders](feature_encoders.md)
   * [Grave Escape](feature_grave_esc.md)
   * [Key Lock](feature_key_lock.md)
   * [Layouts](feature_layouts.md)

docs/feature_encoders.md

@@ -0,0 +1,41 @@
+# Encoders
+
+Basic encoders are supported by adding this to your `rules.mk`:
+
+    ENCODER_ENABLE = yes
+
+and this to your `config.h`:
+
+    #define NUMBER_OF_ENCODERS 1
+    #define ENCODERS_PAD_A { B12 }
+    #define ENCODERS_PAD_B { B13 }
+
+Each PAD_A/B variable defines an array so multiple encoders can be defined, e.g.:
+
+    #define ENCODERS_PAD_A { encoder1a, encoder2a }
+    #define ENCODERS_PAD_B { encoder1a, encoder2b }
+
+If your encoder's clockwise directions are incorrect, you can swap the A & B pad definitions.
+
+Additionally, the resolution can be specified in the same file (the default & suggested is 4):
+
+    #define ENCODER_RESOLUTION 4
+
+## Callbacks
+
+The callback functions can be inserted into your `<keyboard>.c`:
+
+    void encoder_update_kb(uint8_t index, bool clockwise) {
+        encoder_update_user(index, clockwise);
+    }
+
+or `keymap.c`:
+
+    void encoder_update_user(uint8_t index, bool clockwise) {
+        
+    }
+
+
+## Hardware
+
+The A an B lines of the encoders should be wired directly to the MCU, and the C/common lines should be wired to ground.

drivers/arm/twi2c.c

@@ -0,0 +1,240 @@
+/* Copyright 2018 Jack Humbert
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "twi2c.h"
+#include <string.h>
+#include <hal.h>
+#include "chprintf.h"
+#include "memstreams.h"
+#include "printf.h"
+#include "matrix.h"
+
+#ifdef I2C_SLAVE_ENABLE
+
+#include "hal_i2cslave.h"
+
+/**
+ * I2C slave test routine.
+ *
+ * To use: Add file to a project, call startComms() with the address of a serial stream
+ *
+ * There are two different responses:
+ *  a) A read-only transaction - returns the "Initial Reply" message
+ *  b) A write then read transaction - calls a message processor and returns the generated reply.
+ *          Stretches clock until reply available.
+ */
+// static const I2CConfig masterI2CConfig = {
+//   400000
+// };
+
+I2CSlaveMsgCB twi2c_slave_message_process, catchError, clearAfterSend;
+
+#endif
+
+static uint8_t twi2c_address;
+
+static const I2CConfig i2cconfig = {
+  STM32_TIMINGR_PRESC(15U) |
+  STM32_TIMINGR_SCLDEL(4U) | STM32_TIMINGR_SDADEL(2U) |
+  STM32_TIMINGR_SCLH(15U)  | STM32_TIMINGR_SCLL(21U),
+  0,
+  0
+};
+
+char initialReplyBody[50] = "Initial reply";        // 'Status' response if read without preceding write
+
+
+uint32_t messageCounter = 0;                /* Counts number of messages received to return as part of response */
+
+uint8_t  rxBody[2];                       /* stores last message master sent us (intentionally a few bytes smaller than txBody) */
+uint8_t  txBody[MATRIX_ROWS/2];                       /* Return message buffer for computed replies */
+
+BaseSequentialStream *chp = NULL;           // Used for serial logging
+
+
+#ifdef I2C_SLAVE_ENABLE
+
+// Handler when something sent to us
+const I2CSlaveMsg echoRx =
+{
+  sizeof(rxBody),       /* max sizeof received msg body */
+  rxBody,               /* body of received msg */
+  NULL,                 /* do nothing on address match */
+  twi2c_slave_message_process,     /* Routine to process received messages */
+  catchError            /* Error hook */
+};
+
+
+// // 'Empty' reply when nothing to say, and no message received. In RAM, to allow update
+I2CSlaveMsg initialReply =
+{
+  sizeof(initialReplyBody),   /* trailing zero byte will be repeated as needed */
+  (uint8_t *)initialReplyBody,
+  NULL,                 /* do nothing on address match */
+  NULL,                 /* do nothing after reply sent */
+  catchError            /* Error hook */
+};
+
+// // 'Empty' reply when nothing to say, and no message received. In RAM, to allow update
+// I2CSlaveMsg initialReply =
+// {
+//   0,  /* trailing zero byte will be repeated as needed */
+//   NULL,
+//   NULL,                 /* do nothing on address match */
+//   NULL,                 /* do nothing after reply sent */
+//   catchError            /* Error hook */
+// };
+
+
+// Response to received messages
+I2CSlaveMsg echoReply = {  /* this is in RAM so size may be updated */
+  MATRIX_ROWS / 2,                    /* filled in with the length of the message to send */
+  txBody,               /* Response message */
+  NULL,                 /* do nothing special on address match */
+  clearAfterSend,       /* Clear receive buffer once replied */
+  catchError            /* Error hook */
+};
+
+
+
+/**
+ * Track I2C errors
+ */
+uint8_t gotI2cError = 0;
+uint32_t lastI2cErrorFlags = 0;
+
+// Called from ISR to log error
+void noteI2cError(uint32_t flags)
+{
+  lastI2cErrorFlags = flags;
+  gotI2cError = 1;
+}
+
+
+
+/**
+ * Generic error handler
+ *
+ * Called in interrupt context, so need to watch what we do
+ */
+void catchError(I2CDriver *i2cp)
+{
+  noteI2cError(i2cp->errors);
+}
+
+extern void matrix_copy(matrix_row_t * copy);
+
+const char hexString[16] = "0123456789abcdef";
+
+
+
+/**
+ *  Message processor - looks at received message, determines reply as quickly as possible
+ *
+ *  Responds with the value of the messageCounter (in hex), followed by the received message in [..]
+ *
+ *  Note: Called in interrupt context, so need to be quick!
+ */
+void twi2c_slave_message_process(I2CDriver *i2cp) {
+
+  // size_t len = i2cSlaveBytes(i2cp);         // Number of bytes received
+
+  // memset(txBody, 0, MATRIX_ROWS / 2 * sizeof(matrix_row_t));
+  matrix_copy(txBody);
+
+  echoReply.size =  MATRIX_ROWS / 2;
+  i2cSlaveReplyI(i2cp, &echoReply);
+}
+
+
+/**
+ * Callback after sending of response complete - restores default reply in case polled
+ */
+void clearAfterSend(I2CDriver *i2cp)
+{
+  // echoReply.size = 0;               // Clear receive message
+  // i2cSlaveReplyI(i2cp, &initialReply);
+}
+
+
+/**
+ * Start the I2C Slave port to accept comms from master CPU
+ *
+ * We then go into a loop checking for errors, and never return
+ */
+
+void twi2c_slave_init(void) {
+
+  twi2c_init();
+
+
+  i2cStart(&I2C_DRIVER, &i2cconfig);
+#if HAL_USE_I2C_SLAVE
+  I2C_DRIVER.slaveTimeout = MS2ST(100);       // Time for complete message
+#endif
+
+  // i2cSlaveConfigure(&I2C_DRIVER, &echoRx, &initialReply);
+
+  memset(txBody, 0, MATRIX_ROWS / 2 * sizeof(matrix_row_t));
+
+  i2cSlaveConfigure(&I2C_DRIVER, &echoRx, &echoReply);
+
+  // Enable match address after everything else set up
+  i2cMatchAddress(&I2C_DRIVER, slaveI2Caddress/2);
+//  i2cMatchAddress(&I2C_DRIVER, myOtherI2Caddress/2);
+ // i2cMatchAddress(&I2C_DRIVER, 0);  /* "all call" */
+
+  printf("Slave I2C started\n\r");
+
+}
+
+void twi2c_slave_task(void) {
+    if (gotI2cError) {
+      gotI2cError = 0;
+        printf("I2cError: %04x\r\n", lastI2cErrorFlags);
+    }
+}
+
+#endif
+
+uint8_t twi2c_start(uint8_t address) {
+  twi2c_address = address;
+  i2cStart(&I2C_DRIVER, &i2cconfig);
+  return 0;
+}
+
+void twi2c_init(void) {
+  palSetGroupMode(GPIOB,6,7, PAL_MODE_INPUT);       // Try releasing special pins for a short time
+  chThdSleepMilliseconds(10);
+
+  palSetPadMode(GPIOB, 6, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN | PAL_STM32_PUPDR_PULLUP);
+  palSetPadMode(GPIOB, 7, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN | PAL_STM32_PUPDR_PULLUP);
+
+  // try high drive (from kiibohd)
+  // I2C_DRIVER.i2c->C2 |= I2Cx_C2_HDRS;
+  // try glitch fixing (from kiibohd)
+  // I2C_DRIVER.i2c->FLT = 4;
+}
+
+uint8_t twi2c_write(uint8_t data) {
+  return i2cMasterTransmitTimeout(&I2C_DRIVER, twi2c_address/2, &data, 1, 0, 0, MS2ST(100));
+}
+
+uint8_t twi2c_transmit(uint8_t address, uint8_t* data, uint16_t length) {
+  twi2c_address = address;
+  i2cStart(&I2C_DRIVER, &i2cconfig);
+  return i2cMasterTransmitTimeout(&I2C_DRIVER, twi2c_address/2, data, length, 0, 0, MS2ST(100));
+}

drivers/arm/twi2c.h

@@ -0,0 +1,44 @@
+/* Copyright 2018 Jack Humbert
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "ch.h"
+#include "hal.h"
+
+#ifndef I2C_DRIVER
+  #define I2C_DRIVER I2CD1
+#endif
+
+#define slaveI2Caddress  0x30       /* Address in our terms - halved by later code */
+//#define myOtherI2Caddress 0x19
+
+#ifdef I2C_SLAVE_ENABLE
+
+I2CSlaveMsgCB twi2c_slave_message_process, catchError, clearAfterSend;
+
+void twi2c_slave_init(void);
+
+#endif
+
+void twi2c_init(void);
+uint8_t twi2c_start(uint8_t address);
+uint8_t twi2c_write(uint8_t data);
+uint8_t twi2c_read_ack(void);
+uint8_t twi2c_read_nack(void);
+uint8_t twi2c_transmit(uint8_t address, uint8_t* data, uint16_t length);
+uint8_t twi2c_receive(uint8_t address, uint8_t* data, uint16_t length);
+uint8_t twi2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length);
+uint8_t twi2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length);
+void twi2c_stop(void);

drivers/arm/ws2812.c

@@ -0,0 +1,159 @@
+/*
+ * LEDDriver.c
+ *
+ *  Created on: Aug 26, 2013
+ *      Author: Omri Iluz
+ */
+
+#include "ws2812.h"
+#include "stdlib.h"
+
+static uint8_t *fb;
+static int sLeds;
+static stm32_gpio_t *sPort;
+static uint32_t sMask;
+uint8_t* dma_source;
+
+void setColor(uint8_t color, uint8_t *buf,uint32_t mask){
+  int i;
+  for (i=0;i<8;i++){
+    buf[i]=((color<<i)&0b10000000?0x0:mask);
+  }
+}
+
+void setColorRGB(Color c, uint8_t *buf, uint32_t mask){
+  setColor(c.G,buf, mask);
+  setColor(c.R,buf+8, mask);
+  setColor(c.B,buf+16, mask);
+}
+
+/**
+ * @brief   Initialize Led Driver
+ * @details Initialize the Led Driver based on parameters.
+ *          Following initialization, the frame buffer would automatically be
+ *          exported to the supplied port and pins in the right timing to drive
+ *          a chain of WS2812B controllers
+ * @note    The function assumes the controller is running at 72Mhz
+ * @note    Timing is critical for WS2812. While all timing is done in hardware
+ *          need to verify memory bandwidth is not exhausted to avoid DMA delays
+ *
+ * @param[in] leds      length of the LED chain controlled by each pin
+ * @param[in] port      which port would be used for output
+ * @param[in] mask      Which pins would be used for output, each pin is a full chain
+ * @param[out] o_fb     initialized frame buffer
+ *
+ */
+void ledDriverInit(int leds, stm32_gpio_t *port, uint32_t mask, uint8_t **o_fb) {
+  sLeds=leds;
+  sPort=port;
+  sMask=mask;
+  palSetGroupMode(port, sMask, 0, PAL_MODE_OUTPUT_PUSHPULL|PAL_STM32_OSPEED_HIGHEST|PAL_STM32_PUPDR_FLOATING);
+
+  // configure pwm timers -
+  // timer 2 as master, active for data transmission and inactive to disable transmission during reset period (50uS)
+  // timer 3 as slave, during active time creates a 1.25 uS signal, with duty cycle controlled by frame buffer values
+  static PWMConfig pwmc2 = {72000000 / 90, /* 800Khz PWM clock frequency. 1/90 of PWMC3   */
+                            (72000000 / 90) * 0.05, /*Total period is 50ms (20FPS), including sLeds cycles + reset length for ws2812b and FB writes  */
+                            NULL,
+                            { {PWM_OUTPUT_ACTIVE_HIGH, NULL},
+                              {PWM_OUTPUT_DISABLED, NULL},
+                              {PWM_OUTPUT_DISABLED, NULL},
+                              {PWM_OUTPUT_DISABLED, NULL}},
+                              TIM_CR2_MMS_2, /* master mode selection */
+                              0, };
+  /* master mode selection */
+  static PWMConfig pwmc3 = {72000000,/* 72Mhz PWM clock frequency.   */
+                            90, /* 90 cycles period (1.25 uS per period @72Mhz       */
+                            NULL,
+                            { {PWM_OUTPUT_ACTIVE_HIGH, NULL},
+                              {PWM_OUTPUT_ACTIVE_HIGH, NULL},
+                              {PWM_OUTPUT_ACTIVE_HIGH, NULL},
+                              {PWM_OUTPUT_ACTIVE_HIGH, NULL}},
+                              0,
+                              0,
+  };
+  dma_source = chHeapAlloc(NULL, 1);
+  fb = chHeapAlloc(NULL, ((sLeds) * 24)+10);
+  *o_fb=fb;
+  int j;
+  for (j = 0; j < (sLeds) * 24; j++) fb[j] = 0;
+  dma_source[0] = sMask;
+  // DMA stream 2, triggered by channel3 pwm signal. if FB indicates, reset output value early to indicate "0" bit to ws2812
+  dmaStreamAllocate(STM32_DMA1_STREAM2, 10, NULL, NULL);
+  dmaStreamSetPeripheral(STM32_DMA1_STREAM2, &(sPort->BSRR.H.clear));
+  dmaStreamSetMemory0(STM32_DMA1_STREAM2, fb);
+  dmaStreamSetTransactionSize(STM32_DMA1_STREAM2, (sLeds) * 24);
+  dmaStreamSetMode(
+      STM32_DMA1_STREAM2,
+      STM32_DMA_CR_DIR_M2P | STM32_DMA_CR_MINC | STM32_DMA_CR_PSIZE_BYTE
+      | STM32_DMA_CR_MSIZE_BYTE | STM32_DMA_CR_CIRC | STM32_DMA_CR_PL(2));
+  // DMA stream 3, triggered by pwm update event. output high at beginning of signal
+  dmaStreamAllocate(STM32_DMA1_STREAM3, 10, NULL, NULL);
+  dmaStreamSetPeripheral(STM32_DMA1_STREAM3, &(sPort->BSRR.H.set));
+  dmaStreamSetMemory0(STM32_DMA1_STREAM3, dma_source);
+  dmaStreamSetTransactionSize(STM32_DMA1_STREAM3, 1);
+  dmaStreamSetMode(
+      STM32_DMA1_STREAM3, STM32_DMA_CR_TEIE |
+      STM32_DMA_CR_DIR_M2P | STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE
+      | STM32_DMA_CR_CIRC | STM32_DMA_CR_PL(3));
+  // DMA stream 6, triggered by channel1 update event. reset output value late to indicate "1" bit to ws2812.
+  // always triggers but no affect if dma stream 2 already change output value to 0
+  dmaStreamAllocate(STM32_DMA1_STREAM6, 10, NULL, NULL);
+  dmaStreamSetPeripheral(STM32_DMA1_STREAM6, &(sPort->BSRR.H.clear));
+  dmaStreamSetMemory0(STM32_DMA1_STREAM6, dma_source);
+  dmaStreamSetTransactionSize(STM32_DMA1_STREAM6, 1);
+  dmaStreamSetMode(
+      STM32_DMA1_STREAM6,
+      STM32_DMA_CR_DIR_M2P | STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE
+      | STM32_DMA_CR_CIRC | STM32_DMA_CR_PL(3));
+  pwmStart(&PWMD2, &pwmc2);
+  pwmStart(&PWMD3, &pwmc3);
+  // set pwm3 as slave, triggerd by pwm2 oc1 event. disables pwmd2 for synchronization.
+  PWMD3.tim->SMCR |= TIM_SMCR_SMS_0 | TIM_SMCR_SMS_2 | TIM_SMCR_TS_0;
+  PWMD2.tim->CR1 &= ~TIM_CR1_CEN;
+  // set pwm values.
+  // 28 (duty in ticks) / 90 (period in ticks) * 1.25uS (period in S) = 0.39 uS
+  pwmEnableChannel(&PWMD3, 2, 28);
+  // 58 (duty in ticks) / 90 (period in ticks) * 1.25uS (period in S) = 0.806 uS
+  pwmEnableChannel(&PWMD3, 0, 58);
+  // active during transfer of 90 cycles * sLeds * 24 bytes * 1/90 multiplier
+  pwmEnableChannel(&PWMD2, 0, 90 * sLeds * 24 / 90);
+  // stop and reset counters for synchronization
+  PWMD2.tim->CNT = 0;
+  // Slave (TIM3) needs to "update" immediately after master (TIM2) start in order to start in sync.
+  // this initial sync is crucial for the stability of the run
+  PWMD3.tim->CNT = 89;
+  PWMD3.tim->DIER |= TIM_DIER_CC3DE | TIM_DIER_CC1DE | TIM_DIER_UDE;
+  dmaStreamEnable(STM32_DMA1_STREAM3);
+  dmaStreamEnable(STM32_DMA1_STREAM6);
+  dmaStreamEnable(STM32_DMA1_STREAM2);
+  // all systems go! both timers and all channels are configured to resonate
+  // in complete sync without any need for CPU cycles (only DMA and timers)
+  // start pwm2 for system to start resonating
+  PWMD2.tim->CR1 |= TIM_CR1_CEN;
+}
+
+void ledDriverWaitCycle(void){
+  while (PWMD2.tim->CNT < 90 * sLeds * 24 / 90){chThdSleepMicroseconds(1);};
+}
+
+void testPatternFB(uint8_t *fb){
+  int i;
+  Color tmpC = {rand()%256, rand()%256, rand()%256};
+  for (i=0;i<sLeds;i++){
+    setColorRGB(tmpC,fb+24*i, sMask);
+  }
+}
+
+void ws2812_setleds(LED_TYPE *ledarray, uint16_t number_of_leds) {
+//   uint8_t i = 0;
+//   while (i < number_of_leds) {
+//     ws2812_write_led(i, ledarray[i].r, ledarray[i].g, ledarray[i].b);
+//     i++;
+//   }
+}
+
+
+void ws2812_setleds_rgbw(LED_TYPE *ledarray, uint16_t number_of_leds) {
+
+}

drivers/arm/ws2812.h

@@ -0,0 +1,31 @@
+/*
+ * LEDDriver.h
+ *
+ *  Created on: Aug 26, 2013
+ *      Author: Omri Iluz
+ */
+
+#ifndef WS2812_H_
+#define WS2812_H_
+
+#include "hal.h"
+#include "rgblight_types.h"
+
+#define sign(x) (( x > 0 ) - ( x < 0 ))
+
+typedef struct Color Color;
+struct Color {
+  uint8_t R;
+  uint8_t G;
+  uint8_t B;
+};
+
+void ledDriverInit(int leds, stm32_gpio_t *port, uint32_t mask, uint8_t **o_fb);
+void setColorRGB(Color c, uint8_t *buf, uint32_t mask);
+void testPatternFB(uint8_t *fb);
+void ledDriverWaitCycle(void);
+
+void ws2812_setleds(LED_TYPE *ledarray, uint16_t number_of_leds);
+void ws2812_setleds_rgbw(LED_TYPE *ledarray, uint16_t number_of_leds);
+
+#endif /* LEDDRIVER_H_ */

drivers/avr/i2c_master.h

@@ -1,22 +0,0 @@
-/* Library made by: g4lvanix
- * Github repository: https://github.com/g4lvanix/I2C-master-lib
- */
-
-#ifndef I2C_MASTER_H
-#define I2C_MASTER_H
-
-#define I2C_READ 0x01
-#define I2C_WRITE 0x00
-
-void i2c_init(void);
-uint8_t i2c_start(uint8_t address);
-uint8_t i2c_write(uint8_t data);
-uint8_t i2c_read_ack(void);
-uint8_t i2c_read_nack(void);
-uint8_t i2c_transmit(uint8_t address, uint8_t* data, uint16_t length);
-uint8_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length);
-uint8_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length);
-uint8_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length);
-void i2c_stop(void);
-
-#endif // I2C_MASTER_H

drivers/avr/is31fl3731.c

@@ -1,244 +0,0 @@
-/* Copyright 2017 Jason Williams
- * Copyright 2018 Jack Humbert
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "is31fl3731.h"
-#include <avr/interrupt.h>
-#include <avr/io.h>
-#include <util/delay.h>
-#include <string.h>
-#include "i2c_master.h"
-#include "progmem.h"
-
-// This is a 7-bit address, that gets left-shifted and bit 0
-// set to 0 for write, 1 for read (as per I2C protocol)
-// The address will vary depending on your wiring:
-// 0b1110100 AD <-> GND
-// 0b1110111 AD <-> VCC
-// 0b1110101 AD <-> SCL
-// 0b1110110 AD <-> SDA
-#define ISSI_ADDR_DEFAULT 0x74
-
-#define ISSI_REG_CONFIG  0x00
-#define ISSI_REG_CONFIG_PICTUREMODE 0x00
-#define ISSI_REG_CONFIG_AUTOPLAYMODE 0x08
-#define ISSI_REG_CONFIG_AUDIOPLAYMODE 0x18
-
-#define ISSI_CONF_PICTUREMODE 0x00
-#define ISSI_CONF_AUTOFRAMEMODE 0x04
-#define ISSI_CONF_AUDIOMODE 0x08
-
-#define ISSI_REG_PICTUREFRAME  0x01
-
-#define ISSI_REG_SHUTDOWN 0x0A
-#define ISSI_REG_AUDIOSYNC 0x06
-
-#define ISSI_COMMANDREGISTER 0xFD
-#define ISSI_BANK_FUNCTIONREG 0x0B    // helpfully called 'page nine'
-
-// Transfer buffer for TWITransmitData()
-uint8_t g_twi_transfer_buffer[20];
-
-// These buffers match the IS31FL3731 PWM registers 0x24-0xB3.
-// Storing them like this is optimal for I2C transfers to the registers.
-// We could optimize this and take out the unused registers from these
-// buffers and the transfers in IS31FL3731_write_pwm_buffer() but it's
-// probably not worth the extra complexity.
-uint8_t g_pwm_buffer[DRIVER_COUNT][144];
-bool g_pwm_buffer_update_required = false;
-
-uint8_t g_led_control_registers[DRIVER_COUNT][18] = { { 0 }, { 0 } };
-bool g_led_control_registers_update_required = false;
-
-// This is the bit pattern in the LED control registers
-// (for matrix A, add one to register for matrix B)
-//
-//  reg -  b7  b6  b5  b4  b3  b2  b1  b0
-// 0x00 - R08,R07,R06,R05,R04,R03,R02,R01
-// 0x02 - G08,G07,G06,G05,G04,G03,G02,R00
-// 0x04 - B08,B07,B06,B05,B04,B03,G01,G00
-// 0x06 -  - , - , - , - , - ,B02,B01,B00
-// 0x08 -  - , - , - , - , - , - , - , -
-// 0x0A - B17,B16,B15, - , - , - , - , -
-// 0x0C - G17,G16,B14,B13,B12,B11,B10,B09
-// 0x0E - R17,G15,G14,G13,G12,G11,G10,G09
-// 0x10 - R16,R15,R14,R13,R12,R11,R10,R09
-
-
-void IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data )
-{
-	g_twi_transfer_buffer[0] = reg;
-	g_twi_transfer_buffer[1] = data;
-
-	//Transmit data until succesful
-	while(i2c_transmit(addr << 1, g_twi_transfer_buffer,2) != 0); 
-}
-
-void IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer )
-{
-	// assumes bank is already selected
-
-	// transmit PWM registers in 9 transfers of 16 bytes
-	// g_twi_transfer_buffer[] is 20 bytes
-
-	// iterate over the pwm_buffer contents at 16 byte intervals
-	for ( int i = 0; i < 144; i += 16 )
-	{
-		// set the first register, e.g. 0x24, 0x34, 0x44, etc.
-		g_twi_transfer_buffer[0] = 0x24 + i;
-		// copy the data from i to i+15
-		// device will auto-increment register for data after the first byte
-		// thus this sets registers 0x24-0x33, 0x34-0x43, etc. in one transfer
-		for ( int j = 0; j < 16; j++ )
-		{
-			g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
-		}
-
-		//Transmit buffer until succesful
-		while(i2c_transmit(addr << 1, g_twi_transfer_buffer,17) != 0);
-	}
-}
-
-void IS31FL3731_init( uint8_t addr )
-{
-	// In order to avoid the LEDs being driven with garbage data
-	// in the LED driver's PWM registers, first enable software shutdown,
-	// then set up the mode and other settings, clear the PWM registers,
-	// then disable software shutdown.
-
-	// select "function register" bank
-	IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG );
-
-	// enable software shutdown
-	IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x00 );
-	// this delay was copied from other drivers, might not be needed
-	_delay_ms( 10 );
-
-	// picture mode
-	IS31FL3731_write_register( addr, ISSI_REG_CONFIG, ISSI_REG_CONFIG_PICTUREMODE );
-	// display frame 0
-	IS31FL3731_write_register( addr, ISSI_REG_PICTUREFRAME, 0x00 );
-	// audio sync off
-	IS31FL3731_write_register( addr, ISSI_REG_AUDIOSYNC, 0x00 );
-
-	// select bank 0
-	IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 );
-
-	// turn off all LEDs in the LED control register
-	for ( int i = 0x00; i <= 0x11; i++ )
-	{
-		IS31FL3731_write_register( addr, i, 0x00 );
-	}
-
-	// turn off all LEDs in the blink control register (not really needed)
-	for ( int i = 0x12; i <= 0x23; i++ )
-	{
-		IS31FL3731_write_register( addr, i, 0x00 );
-	}
-
-	// set PWM on all LEDs to 0
-	for ( int i = 0x24; i <= 0xB3; i++ )
-	{
-		IS31FL3731_write_register( addr, i, 0x00 );
-	}
-
-	// select "function register" bank
-	IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG );
-
-	// disable software shutdown
-	IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x01 );
-
-	// select bank 0 and leave it selected.
-	// most usage after initialization is just writing PWM buffers in bank 0
-	// as there's not much point in double-buffering
-	IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 );
-}
-
-void IS31FL3731_set_color( int index, uint8_t red, uint8_t green, uint8_t blue )
-{
-	if ( index >= 0 && index < DRIVER_LED_TOTAL ) {
-		is31_led led = g_is31_leds[index];
-
-		// Subtract 0x24 to get the second index of g_pwm_buffer
-		g_pwm_buffer[led.driver][led.r - 0x24] = red;
-		g_pwm_buffer[led.driver][led.g - 0x24] = green;
-		g_pwm_buffer[led.driver][led.b - 0x24] = blue;
-		g_pwm_buffer_update_required = true;
-	}
-}
-
-void IS31FL3731_set_color_all( uint8_t red, uint8_t green, uint8_t blue )
-{
-	for ( int i = 0; i < DRIVER_LED_TOTAL; i++ )
-	{
-		IS31FL3731_set_color( i, red, green, blue );
-	}
-}
-
-void IS31FL3731_set_led_control_register( uint8_t index, bool red, bool green, bool blue )
-{
-	is31_led led = g_is31_leds[index];
-
-  uint8_t control_register_r = (led.r - 0x24) / 8;
-  uint8_t control_register_g = (led.g - 0x24) / 8;
-  uint8_t control_register_b = (led.b - 0x24) / 8;
-  uint8_t bit_r = (led.r - 0x24) % 8;
-  uint8_t bit_g = (led.g - 0x24) % 8;
-  uint8_t bit_b = (led.b - 0x24) % 8;
-
-	if ( red ) {
-		g_led_control_registers[led.driver][control_register_r] |= (1 << bit_r);
-	} else {
-		g_led_control_registers[led.driver][control_register_r] &= ~(1 << bit_r);
-	}
-	if ( green ) {
-		g_led_control_registers[led.driver][control_register_g] |= (1 << bit_g);
-	} else {
-		g_led_control_registers[led.driver][control_register_g] &= ~(1 << bit_g);
-	}
-	if ( blue ) {
-		g_led_control_registers[led.driver][control_register_b] |= (1 << bit_b);
-	} else {
-		g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b);
-	}
-
-	g_led_control_registers_update_required = true;
-
-
-}
-
-void IS31FL3731_update_pwm_buffers( uint8_t addr1, uint8_t addr2 )
-{
-	if ( g_pwm_buffer_update_required )
-	{
-		IS31FL3731_write_pwm_buffer( addr1, g_pwm_buffer[0] );
-		IS31FL3731_write_pwm_buffer( addr2, g_pwm_buffer[1] );
-	}
-	g_pwm_buffer_update_required = false;
-}
-
-void IS31FL3731_update_led_control_registers( uint8_t addr1, uint8_t addr2 )
-{
-	if ( g_led_control_registers_update_required )
-	{
-		for ( int i=0; i<18; i++ )
-		{
-			IS31FL3731_write_register(addr1, i, g_led_control_registers[0][i] );
-			IS31FL3731_write_register(addr2, i, g_led_control_registers[1][i] );
-		}
-	}
-}
-

drivers/avr/twi2c.c

@@ -0,0 +1,149 @@
+/* Library made by: g4lvanix
+ * Github repository: https://github.com/g4lvanix/I2C-master-lib
+ */
+
+#include <avr/io.h>
+#include <util/twi.h>
+
+#include "twi2c.h"
+
+#define F_SCL 400000UL // SCL frequency
+#define Prescaler 1
+#define TWBR_val ((((F_CPU / F_SCL) / Prescaler) - 16 ) / 2)
+
+void twi2c_init(void)
+{
+	TWBR = (uint8_t)TWBR_val;
+}
+
+uint8_t twi2c_start(uint8_t address)
+{
+	// reset TWI control register
+	TWCR = 0;
+	// transmit START condition
+	TWCR = (1<<TWINT) | (1<<TWSTA) | (1<<TWEN);
+	// wait for end of transmission
+	while( !(TWCR & (1<<TWINT)) );
+
+	// check if the start condition was successfully transmitted
+	if((TWSR & 0xF8) != TW_START){ return 1; }
+
+	// load slave address into data register
+	TWDR = address;
+	// start transmission of address
+	TWCR = (1<<TWINT) | (1<<TWEN);
+	// wait for end of transmission
+	while( !(TWCR & (1<<TWINT)) );
+
+	// check if the device has acknowledged the READ / WRITE mode
+	uint8_t twst = TW_STATUS & 0xF8;
+	if ( (twst != TW_MT_SLA_ACK) && (twst != TW_MR_SLA_ACK) ) return 1;
+
+	return 0;
+}
+
+uint8_t twi2c_write(uint8_t data)
+{
+	// load data into data register
+	TWDR = data;
+	// start transmission of data
+	TWCR = (1<<TWINT) | (1<<TWEN);
+	// wait for end of transmission
+	while( !(TWCR & (1<<TWINT)) );
+
+	if( (TWSR & 0xF8) != TW_MT_DATA_ACK ){ return 1; }
+
+	return 0;
+}
+
+uint8_t twi2c_read_ack(void)
+{
+
+	// start TWI module and acknowledge data after reception
+	TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWEA);
+	// wait for end of transmission
+	while( !(TWCR & (1<<TWINT)) );
+	// return received data from TWDR
+	return TWDR;
+}
+
+uint8_t twi2c_read_nack(void)
+{
+
+	// start receiving without acknowledging reception
+	TWCR = (1<<TWINT) | (1<<TWEN);
+	// wait for end of transmission
+	while( !(TWCR & (1<<TWINT)) );
+	// return received data from TWDR
+	return TWDR;
+}
+
+uint8_t twi2c_transmit(uint8_t address, uint8_t* data, uint16_t length)
+{
+	if (twi2c_start(address | I2C_WRITE)) return 1;
+
+	for (uint16_t i = 0; i < length; i++)
+	{
+		if (twi2c_write(data[i])) return 1;
+	}
+
+	twi2c_stop();
+
+	return 0;
+}
+
+uint8_t twi2c_receive(uint8_t address, uint8_t* data, uint16_t length)
+{
+	if (twi2c_start(address | I2C_READ)) return 1;
+
+	for (uint16_t i = 0; i < (length-1); i++)
+	{
+		data[i] = twi2c_read_ack();
+	}
+	data[(length-1)] = twi2c_read_nack();
+
+	twi2c_stop();
+
+	return 0;
+}
+
+uint8_t twi2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length)
+{
+	if (twi2c_start(devaddr | 0x00)) return 1;
+
+	twi2c_write(regaddr);
+
+	for (uint16_t i = 0; i < length; i++)
+	{
+		if (twi2c_write(data[i])) return 1;
+	}
+
+	twi2c_stop();
+
+	return 0;
+}
+
+uint8_t twi2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length)
+{
+	if (twi2c_start(devaddr)) return 1;
+
+	twi2c_write(regaddr);
+
+	if (twi2c_start(devaddr | 0x01)) return 1;
+
+	for (uint16_t i = 0; i < (length-1); i++)
+	{
+		data[i] = twi2c_read_ack();
+	}
+	data[(length-1)] = twi2c_read_nack();
+
+	twi2c_stop();
+
+	return 0;
+}
+
+void twi2c_stop(void)
+{
+	// transmit STOP condition
+	TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWSTO);
+}

drivers/avr/twi2c.h

@@ -0,0 +1,22 @@
+/* Library made by: g4lvanix
+ * Github repository: https://github.com/g4lvanix/I2C-master-lib
+ */
+
+#ifndef TWI2C_H
+#define TWI2C_H
+
+#define I2C_READ 0x01
+#define I2C_WRITE 0x00
+
+void twi2c_init(void);
+uint8_t twi2c_start(uint8_t address);
+uint8_t twi2c_write(uint8_t data);
+uint8_t twi2c_read_ack(void);
+uint8_t twi2c_read_nack(void);
+uint8_t twi2c_transmit(uint8_t address, uint8_t* data, uint16_t length);
+uint8_t twi2c_receive(uint8_t address, uint8_t* data, uint16_t length);
+uint8_t twi2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length);
+uint8_t twi2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length);
+void twi2c_stop(void);
+
+#endif // I2C_MASTER_H

drivers/is31fl3731.c

@@ -0,0 +1,244 @@
+/* Copyright 2017 Jason Williams
+ * Copyright 2018 Jack Humbert
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "is31fl3731.h"
+#include "wait.h"
+#include <string.h>
+#include "twi2c.h"
+#include "progmem.h"
+
+// This is a 7-bit address, that gets left-shifted and bit 0
+// set to 0 for write, 1 for read (as per I2C protocol)
+// The address will vary depending on your wiring:
+// 0b1110100 AD <-> GND
+// 0b1110111 AD <-> VCC
+// 0b1110101 AD <-> SCL
+// 0b1110110 AD <-> SDA
+#define ISSI_ADDR_DEFAULT 0x74
+
+#define ISSI_REG_CONFIG  0x00
+#define ISSI_REG_CONFIG_PICTUREMODE 0x00
+#define ISSI_REG_CONFIG_AUTOPLAYMODE 0x08
+#define ISSI_REG_CONFIG_AUDIOPLAYMODE 0x18
+
+#define ISSI_CONF_PICTUREMODE 0x00
+#define ISSI_CONF_AUTOFRAMEMODE 0x04
+#define ISSI_CONF_AUDIOMODE 0x08
+
+#define ISSI_REG_PICTUREFRAME  0x01
+
+#define ISSI_REG_SHUTDOWN 0x0A
+#define ISSI_REG_AUDIOSYNC 0x06
+
+#define ISSI_COMMANDREGISTER 0xFD
+#define ISSI_BANK_FUNCTIONREG 0x0B    // helpfully called 'page nine'
+
+// Transfer buffer for TWITransmitData()
+uint8_t g_twi_transfer_buffer[20];
+
+// These buffers match the IS31FL3731 PWM registers 0x24-0xB3.
+// Storing them like this is optimal for I2C transfers to the registers.
+// We could optimize this and take out the unused registers from these
+// buffers and the transfers in IS31FL3731_write_pwm_buffer() but it's
+// probably not worth the extra complexity.
+uint8_t g_pwm_buffer[DRIVER_COUNT][144];
+bool g_pwm_buffer_update_required = false;
+
+uint8_t g_led_control_registers[DRIVER_COUNT][18] = { { 0 }, { 0 } };
+bool g_led_control_registers_update_required = false;
+
+// This is the bit pattern in the LED control registers
+// (for matrix A, add one to register for matrix B)
+//
+//  reg -  b7  b6  b5  b4  b3  b2  b1  b0
+// 0x00 - R08,R07,R06,R05,R04,R03,R02,R01
+// 0x02 - G08,G07,G06,G05,G04,G03,G02,R00
+// 0x04 - B08,B07,B06,B05,B04,B03,G01,G00
+// 0x06 -  - , - , - , - , - ,B02,B01,B00
+// 0x08 -  - , - , - , - , - , - , - , -
+// 0x0A - B17,B16,B15, - , - , - , - , -
+// 0x0C - G17,G16,B14,B13,B12,B11,B10,B09
+// 0x0E - R17,G15,G14,G13,G12,G11,G10,G09
+// 0x10 - R16,R15,R14,R13,R12,R11,R10,R09
+
+
+void IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data )
+{
+  g_twi_transfer_buffer[0] = reg;
+  g_twi_transfer_buffer[1] = data;
+
+  //Transmit data until succesful
+  //while(twi2c_transmit(addr << 1, g_twi_transfer_buffer,2) != 0);
+  twi2c_transmit(addr << 1, g_twi_transfer_buffer,2);
+}
+
+void IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer )
+{
+  // assumes bank is already selected
+
+  // transmit PWM registers in 9 transfers of 16 bytes
+  // g_twi_transfer_buffer[] is 20 bytes
+
+  // iterate over the pwm_buffer contents at 16 byte intervals
+  for ( int i = 0; i < 144; i += 16 )
+  {
+    // set the first register, e.g. 0x24, 0x34, 0x44, etc.
+    g_twi_transfer_buffer[0] = 0x24 + i;
+    // copy the data from i to i+15
+    // device will auto-increment register for data after the first byte
+    // thus this sets registers 0x24-0x33, 0x34-0x43, etc. in one transfer
+    for ( int j = 0; j < 16; j++ )
+    {
+      g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
+    }
+
+    //Transmit buffer until succesful
+    //while(twi2c_transmit(addr << 1, g_twi_transfer_buffer,17) != 0);
+    twi2c_transmit(addr << 1, g_twi_transfer_buffer,17);
+  }
+}
+
+void IS31FL3731_init( uint8_t addr )
+{
+  // In order to avoid the LEDs being driven with garbage data
+  // in the LED driver's PWM registers, first enable software shutdown,
+  // then set up the mode and other settings, clear the PWM registers,
+  // then disable software shutdown.
+
+  // select "function register" bank
+  IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG );
+
+  // enable software shutdown
+  IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x00 );
+  // this delay was copied from other drivers, might not be needed
+  wait_ms( 10 );
+
+  // picture mode
+  IS31FL3731_write_register( addr, ISSI_REG_CONFIG, ISSI_REG_CONFIG_PICTUREMODE );
+  // display frame 0
+  IS31FL3731_write_register( addr, ISSI_REG_PICTUREFRAME, 0x00 );
+  // audio sync off
+  IS31FL3731_write_register( addr, ISSI_REG_AUDIOSYNC, 0x00 );
+
+  // select bank 0
+  IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 );
+
+  // turn off all LEDs in the LED control register
+  for ( int i = 0x00; i <= 0x11; i++ )
+  {
+    IS31FL3731_write_register( addr, i, 0x00 );
+  }
+
+  // turn off all LEDs in the blink control register (not really needed)
+  for ( int i = 0x12; i <= 0x23; i++ )
+  {
+    IS31FL3731_write_register( addr, i, 0x00 );
+  }
+
+  // set PWM on all LEDs to 0
+  for ( int i = 0x24; i <= 0xB3; i++ )
+  {
+    IS31FL3731_write_register( addr, i, 0x00 );
+  }
+
+  // select "function register" bank
+  IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG );
+
+  // disable software shutdown
+  IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x01 );
+
+  // select bank 0 and leave it selected.
+  // most usage after initialization is just writing PWM buffers in bank 0
+  // as there's not much point in double-buffering
+  IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 );
+}
+
+void IS31FL3731_set_color( int index, uint8_t red, uint8_t green, uint8_t blue )
+{
+  if ( index >= 0 && index < DRIVER_LED_TOTAL ) {
+    is31_led led = g_is31_leds[index];
+
+    // Subtract 0x24 to get the second index of g_pwm_buffer
+    g_pwm_buffer[led.driver][led.r - 0x24] = red;
+    g_pwm_buffer[led.driver][led.g - 0x24] = green;
+    g_pwm_buffer[led.driver][led.b - 0x24] = blue;
+    g_pwm_buffer_update_required = true;
+  }
+}
+
+void IS31FL3731_set_color_all( uint8_t red, uint8_t green, uint8_t blue )
+{
+  for ( int i = 0; i < DRIVER_LED_TOTAL; i++ )
+  {
+    IS31FL3731_set_color( i, red, green, blue );
+  }
+}
+
+void IS31FL3731_set_led_control_register( uint8_t index, bool red, bool green, bool blue )
+{
+  is31_led led = g_is31_leds[index];
+
+  uint8_t control_register_r = (led.r - 0x24) / 8;
+  uint8_t control_register_g = (led.g - 0x24) / 8;
+  uint8_t control_register_b = (led.b - 0x24) / 8;
+  uint8_t bit_r = (led.r - 0x24) % 8;
+  uint8_t bit_g = (led.g - 0x24) % 8;
+  uint8_t bit_b = (led.b - 0x24) % 8;
+
+  if ( red ) {
+    g_led_control_registers[led.driver][control_register_r] |= (1 << bit_r);
+  } else {
+    g_led_control_registers[led.driver][control_register_r] &= ~(1 << bit_r);
+  }
+  if ( green ) {
+    g_led_control_registers[led.driver][control_register_g] |= (1 << bit_g);
+  } else {
+    g_led_control_registers[led.driver][control_register_g] &= ~(1 << bit_g);
+  }
+  if ( blue ) {
+    g_led_control_registers[led.driver][control_register_b] |= (1 << bit_b);
+  } else {
+    g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b);
+  }
+
+  g_led_control_registers_update_required = true;
+
+
+}
+
+void IS31FL3731_update_pwm_buffers( uint8_t addr1, uint8_t addr2 )
+{
+  if ( g_pwm_buffer_update_required )
+  {
+    IS31FL3731_write_pwm_buffer( addr1, g_pwm_buffer[0] );
+    IS31FL3731_write_pwm_buffer( addr2, g_pwm_buffer[1] );
+  }
+  g_pwm_buffer_update_required = false;
+}
+
+void IS31FL3731_update_led_control_registers( uint8_t addr1, uint8_t addr2 )
+{
+  if ( g_led_control_registers_update_required )
+  {
+    for ( int i=0; i<18; i++ )
+    {
+      IS31FL3731_write_register(addr1, i, g_led_control_registers[0][i] );
+      IS31FL3731_write_register(addr2, i, g_led_control_registers[1][i] );
+    }
+  }
+}
+

drivers/is31fl3731.h

@@ -0,0 +1,214 @@
+/* Copyright 2017 Jason Williams
+ * Copyright 2018 Jack Humbert
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#ifndef IS31FL3731_DRIVER_H
+#define IS31FL3731_DRIVER_H
+
+#include <stdint.h>
+#include <stdbool.h>
+
+typedef struct is31_led {
+  uint8_t driver:2;
+  uint8_t r;
+  uint8_t g;
+  uint8_t b;
+} __attribute__((packed)) is31_led;
+
+extern const is31_led g_is31_leds[DRIVER_LED_TOTAL];
+
+void IS31FL3731_init( uint8_t addr );
+void IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data );
+void IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer );
+
+void IS31FL3731_set_color( int index, uint8_t red, uint8_t green, uint8_t blue );
+void IS31FL3731_set_color_all( uint8_t red, uint8_t green, uint8_t blue );
+
+void IS31FL3731_set_led_control_register( uint8_t index, bool red, bool green, bool blue );
+
+// This should not be called from an interrupt
+// (eg. from a timer interrupt).
+// Call this while idle (in between matrix scans).
+// If the buffer is dirty, it will update the driver with the buffer.
+void IS31FL3731_update_pwm_buffers( uint8_t addr1, uint8_t addr2 );
+void IS31FL3731_update_led_control_registers( uint8_t addr1, uint8_t addr2 );
+
+#define C1_1  0x24
+#define C1_2  0x25
+#define C1_3  0x26
+#define C1_4  0x27
+#define C1_5  0x28
+#define C1_6  0x29
+#define C1_7  0x2A
+#define C1_8  0x2B
+
+#define C1_9  0x2C
+#define C1_10 0x2D
+#define C1_11 0x2E
+#define C1_12 0x2F
+#define C1_13 0x30
+#define C1_14 0x31
+#define C1_15 0x32
+#define C1_16 0x33
+
+#define C2_1  0x34
+#define C2_2  0x35
+#define C2_3  0x36
+#define C2_4  0x37
+#define C2_5  0x38
+#define C2_6  0x39
+#define C2_7  0x3A
+#define C2_8  0x3B
+
+#define C2_9  0x3C
+#define C2_10 0x3D
+#define C2_11 0x3E
+#define C2_12 0x3F
+#define C2_13 0x40
+#define C2_14 0x41
+#define C2_15 0x42
+#define C2_16 0x43
+
+#define C3_1  0x44
+#define C3_2  0x45
+#define C3_3  0x46
+#define C3_4  0x47
+#define C3_5  0x48
+#define C3_6  0x49
+#define C3_7  0x4A
+#define C3_8  0x4B
+
+#define C3_9  0x4C
+#define C3_10 0x4D
+#define C3_11 0x4E
+#define C3_12 0x4F
+#define C3_13 0x50
+#define C3_14 0x51
+#define C3_15 0x52
+#define C3_16 0x53
+
+#define C4_1  0x54
+#define C4_2  0x55
+#define C4_3  0x56
+#define C4_4  0x57
+#define C4_5  0x58
+#define C4_6  0x59
+#define C4_7  0x5A
+#define C4_8  0x5B
+
+#define C4_9  0x5C
+#define C4_10 0x5D
+#define C4_11 0x5E
+#define C4_12 0x5F
+#define C4_13 0x60
+#define C4_14 0x61
+#define C4_15 0x62
+#define C4_16 0x63
+
+#define C5_1  0x64
+#define C5_2  0x65
+#define C5_3  0x66
+#define C5_4  0x67
+#define C5_5  0x68
+#define C5_6  0x69
+#define C5_7  0x6A
+#define C5_8  0x6B
+
+#define C5_9  0x6C
+#define C5_10 0x6D
+#define C5_11 0x6E
+#define C5_12 0x6F
+#define C5_13 0x70
+#define C5_14 0x71
+#define C5_15 0x72
+#define C5_16 0x73
+
+#define C6_1  0x74
+#define C6_2  0x75
+#define C6_3  0x76
+#define C6_4  0x77
+#define C6_5  0x78
+#define C6_6  0x79
+#define C6_7  0x7A
+#define C6_8  0x7B
+
+#define C6_9  0x7C
+#define C6_10 0x7D
+#define C6_11 0x7E
+#define C6_12 0x7F
+#define C6_13 0x80
+#define C6_14 0x81
+#define C6_15 0x82
+#define C6_16 0x83
+
+#define C7_1  0x84
+#define C7_2  0x85
+#define C7_3  0x86
+#define C7_4  0x87
+#define C7_5  0x88
+#define C7_6  0x89
+#define C7_7  0x8A
+#define C7_8  0x8B
+
+#define C7_9  0x8C
+#define C7_10 0x8D
+#define C7_11 0x8E
+#define C7_12 0x8F
+#define C7_13 0x90
+#define C7_14 0x91
+#define C7_15 0x92
+#define C7_16 0x93
+
+#define C8_1  0x94
+#define C8_2  0x95
+#define C8_3  0x96
+#define C8_4  0x97
+#define C8_5  0x98
+#define C8_6  0x99
+#define C8_7  0x9A
+#define C8_8  0x9B
+
+#define C8_9  0x9C
+#define C8_10 0x9D
+#define C8_11 0x9E
+#define C8_12 0x9F
+#define C8_13 0xA0
+#define C8_14 0xA1
+#define C8_15 0xA2
+#define C8_16 0xA3
+
+#define C9_1  0xA4
+#define C9_2  0xA5
+#define C9_3  0xA6
+#define C9_4  0xA7
+#define C9_5  0xA8
+#define C9_6  0xA9
+#define C9_7  0xAA
+#define C9_8  0xAB
+
+#define C9_9  0xAC
+#define C9_10 0xAD
+#define C9_11 0xAE
+#define C9_12 0xAF
+#define C9_13 0xB0
+#define C9_14 0xB1
+#define C9_15 0xB2
+#define C9_16 0xB3
+
+
+
+#endif // IS31FL3731_DRIVER_H

keyboards/_qmk_handwire/_qmk_handwire.c

@@ -0,0 +1,25 @@
+/* Copyright 2017 skully <skullydazed@gmail.com>
+ *           2018 Jack Humbert <jack.humb@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include "_qmk_handwire.h"
+
+void matrix_init_kb(void) {
+
+}
+
+void matrix_scan_kb(void) {
+
+}

keyboards/_qmk_handwire/_qmk_handwire.h

@@ -0,0 +1,59 @@
+/* Copyright 2017 skully <skullydazed@gmail.com>
+ *           2018 Jack Humbert <jack.humb@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef QMK_HANDWIRE_H
+#define QMK_HANDWIRE_H
+
+#include "quantum.h"
+
+/*
+ * These are shortcuts to help you work with the various layout options. If your 
+ * keymap works with one of the LAYOUT_...() macros you are encouraged to use that
+ * and to contribute your keymap to the corresponding layout in 
+ * `qmk_firmware/layouts/community`.
+ */
+
+/* The fully-featured KEYMAP() that has every single key available in the matrix.
+ */
+#define KEYMAP(\
+    j00, j01, j02, j03, j04, j05, j06, \
+    j10, j11, j12, j13, j14, j15, j16, \
+    j20, j21, j22, j23, j24, j25, j26, \
+    j30, j31, j32, j33, j34, j35, \
+    j40, j41, j42, j43, j44, \
+                        j54, j55, j56, \
+    k00, k01, k02, k03, k04, k05, k06, \
+    k10, k11, k12, k13, k14, k15, k16, \
+    k20, k21, k22, k23, k24, k25, k26, \
+         k31, k32, k33, k34, k35, k36, \
+              k42, k43, k44, k45, k46, \
+    k50, k51, k52 \
+) { \
+    { j00, j01, j02, j03, j04, j05, j06 }, \
+    { j10, j11, j12, j13, j14, j15, j16 }, \
+    { j20, j21, j22, j23, j24, j25, j26 }, \
+    { j30, j31, j32, j33, j34, j35, 0   }, \
+    { j40, j41, j42, j43, j44, 0,   0   }, \
+    { 0,   0,   0,   0,   j54, j55, j56 }, \
+    { k00, k01, k02, k03, k04, k05, k06 }, \
+    { k10, k11, k12, k13, k14, k15, k16 }, \
+    { k20, k21, k22, k23, k24, k25, k26 }, \
+    { 0,   k31, k32, k33, k34, k35, k36 }, \
+    { 0,   0,   k42, k43, k44, k45, k46 }, \
+    { k50, k51, k52, 0,   0,   0,   0   } \
+}
+
+#endif

keyboards/_qmk_handwire/boards/GENERIC_STM32_F303XC/board.c

@@ -0,0 +1,126 @@
+/*
+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#include "hal.h"
+
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+/**
+ * @brief   PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ *          This variable is used by the HAL when initializing the PAL driver.
+ */
+const PALConfig pal_default_config = {
+#if STM32_HAS_GPIOA
+  {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
+   VAL_GPIOA_ODR,   VAL_GPIOA_AFRL,   VAL_GPIOA_AFRH},
+#endif
+#if STM32_HAS_GPIOB
+  {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
+   VAL_GPIOB_ODR,   VAL_GPIOB_AFRL,   VAL_GPIOB_AFRH},
+#endif
+#if STM32_HAS_GPIOC
+  {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
+   VAL_GPIOC_ODR,   VAL_GPIOC_AFRL,   VAL_GPIOC_AFRH},
+#endif
+#if STM32_HAS_GPIOD
+  {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
+   VAL_GPIOD_ODR,   VAL_GPIOD_AFRL,   VAL_GPIOD_AFRH},
+#endif
+#if STM32_HAS_GPIOE
+  {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
+   VAL_GPIOE_ODR,   VAL_GPIOE_AFRL,   VAL_GPIOE_AFRH},
+#endif
+#if STM32_HAS_GPIOF
+  {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
+   VAL_GPIOF_ODR,   VAL_GPIOF_AFRL,   VAL_GPIOF_AFRH},
+#endif
+#if STM32_HAS_GPIOG
+  {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
+   VAL_GPIOG_ODR,   VAL_GPIOG_AFRL,   VAL_GPIOG_AFRH},
+#endif
+#if STM32_HAS_GPIOH
+  {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
+   VAL_GPIOH_ODR,   VAL_GPIOH_AFRL,   VAL_GPIOH_AFRH},
+#endif
+#if STM32_HAS_GPIOI
+  {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
+   VAL_GPIOI_ODR,   VAL_GPIOI_AFRL,   VAL_GPIOI_AFRH}
+#endif
+};
+#endif
+
+void enter_bootloader_mode_if_requested(void);
+
+/**
+ * @brief   Early initialization code.
+ * @details This initialization must be performed just after stack setup
+ *          and before any other initialization.
+ */
+void __early_init(void) {
+  enter_bootloader_mode_if_requested();
+  stm32_clock_init();
+}
+
+#if HAL_USE_SDC || defined(__DOXYGEN__)
+/**
+ * @brief   SDC card detection.
+ */
+bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
+
+  (void)sdcp;
+  /* TODO: Fill the implementation.*/
+  return true;
+}
+
+/**
+ * @brief   SDC card write protection detection.
+ */
+bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
+
+  (void)sdcp;
+  /* TODO: Fill the implementation.*/
+  return false;
+}
+#endif /* HAL_USE_SDC */
+
+#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
+/**
+ * @brief   MMC_SPI card detection.
+ */
+bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
+
+  (void)mmcp;
+  /* TODO: Fill the implementation.*/
+  return true;
+}
+
+/**
+ * @brief   MMC_SPI card write protection detection.
+ */
+bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
+
+  (void)mmcp;
+  /* TODO: Fill the implementation.*/
+  return false;
+}
+#endif
+
+/**
+ * @brief   Board-specific initialization code.
+ * @todo    Add your board-specific code, if any.
+ */
+void boardInit(void) {
+}

keyboards/_qmk_handwire/boards/GENERIC_STM32_F303XC/board.mk

@@ -0,0 +1,5 @@
+# List of all the board related files.
+BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC/board.c
+
+# Required include directories
+BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC