Repository files (latest commit first)

Filename	Latest commit message	Latest commit date
Dean Camera c15eaa5dae When automatic PLL management mode is enabled on the U4 series AVR8 chips, the PLL is now configured for 48MHz and not a divided 96MHz, to lower power consumption and to keep the system within the datasheet specs for 3.3V operation (thanks to Scott Vitale).		2011-10-12 02:27:22 +00:00
..
Class	Added endian-correction to the CDC driver's Line Encoding control request handlers.	2011-10-07 03:47:42 +00:00
Core	When automatic PLL management mode is enabled on the U4 series AVR8 chips, the PLL is now configured for 48MHz and not a divided 96MHz, to lower power consumption and to keep the system within the datasheet specs for 3.3V operation (thanks to Scott Vitale).	2011-10-12 02:27:22 +00:00
USB.h	Added new Host mode Audio Class driver.	2011-06-08 01:26:52 +00:00